VPSLLVW - Packed Shift Left Logical Variable Word

VPSLLVW xmm1{k1}{z}, xmm2, xmm3/m128    (V5+BW+VL
__m128i _mm_sllv_epi16(__m128i a, __m128i b)
__m128i _mm_mask_sllv_epi16(__m128i s, __mmask8 k, __m128i a, __m128i b)
__m128i _mm_maskz_sllv_epi16(__mmask8 k, __m128i a, __m128i b)

For each WORD, set (1) << (2) to (3). Emptied lower bits are zeroed.
VPSLLVW ymm1{k1}{z}, ymm2, ymm3/m256    (V5+BW+VL
__m256i _mm256_sllv_epi16(__m256i a, __m256i b)
__m256i _mm256_mask_sllv_epi16(__m256i s, __mmask16 k, __m256i a, __m256i b)
__m256i _mm256_maskz_sllv_epi16(__mmask16 k, __m256i a, __m256i b)

For each WORD, set (1) << (2) to (3). Emptied lower bits are zeroed.
VPSLLVW zmm1{k1}{z}, zmm2, zmm3/m512    (V5+BW
__m512i _mm512_sllv_epi16(__m512i a, __m512i b)
__m512i _mm512_mask_sllv_epi16(__m512i s, __mmask32 k, __m512i a, __m512i b)
__m512i _mm512_maskz_sllv_epi16(__mmask32 k, __m512i a, __m512i b)

For each WORD, set (1) << (2) to (3). Emptied lower bits are zeroed.

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