VCVTPS2PHX - ConVerT Packed Single to Packed Half X
float -> FP16
VCVTPS2PHX xmm1{k1}{z}, xmm2/m128/m32bcst (V5+FP16+VL
__m128h _mm_cvtxps_ph(__m128 a)
__m128h _mm_mask_cvtxps_ph(__m128h s, __mmask8 k, __m128 a)
__m128h _mm_maskz_cvtxps_ph(__mmask8 k, __m128 a)
VCVTPS2PHX xmm1{k1}{z}, ymm2/m256/m32bcst (V5+FP16+VL
__m128h _mm256_cvtxps_ph(__m256 a)
__m128h _mm256_mask_cvtxps_ph(__m128h s, __mmask8 k, __m256 a)
__m128h _mm256_maskz_cvtxps_ph(__mmask8 k, __m256 a)
VCVTPS2PHX ymm1{k1}{z}, zmm2/m512/m32bcst{er} (V5+FP16
__m256h _mm512_cvtxps_ph(__m512 a)
__m256h _mm512_mask_cvtxps_ph(__m256h s, __mmask16 k, __m512 a)
__m256h _mm512_maskz_cvtxps_ph(__mmask16 k, __m512 a)
__m256h _mm512_cvtx_roundps_ph(__m512 a, int r)
__m256h _mm512_mask_cvtx_roundps_ph(__m256h s, __mmask16 k, __m512 a, int r)
__m256h _mm512_maskz_cvtx_roundps_ph(__mmask16 k, __m512 a, int r)
x86/x64 SIMD Instruction List
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